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DE25-Standard Development Kit - EDU Market
de25

DE25-Standard Development Kit

DE25-Standard – The newest generation dev. kit for Altera ® University Program! 

 

Designed to address the applications requirements for digital logics, embedded systems, and robotics, the DE25-Standard development kit takes advantage of the Altera®  Agilex™ 5 SoC FPGA with 138K LEs to deliver 2.5x performance breakthrough and advanced feature sets such as 1GB DDR4 32-bit data bus, 64MB SDRAM, 8-channel ADC header, GPIO header, an HSMC high-speed connector, and black and light mini LCD, etc. A rich set of input and output features, such as robust switches, LEDs, seven-segment displays, and commonly-used I / O interfaces are included to meet the needs of teaching and experiments.

In addition, the DE25-Standard is armed with the advanced HDMI output port (1080P), a two-lane MIPI CSI / DSI connector for camera and display, and a composite RCA jack for surveillance camera. Developers can leverage the AI tensor block on the Agilex™ 5 FPGA, the MIPI CSI / DSI connector, HDMI output, and the composite RCA jack on the DE25-Standard to develop AI-related applications such as video processing and computer vision.

SKU: DE25 Categories: , ,

Description

DE25-Standard

  • FPGA: A5ED013BB32AE4S (138K LEs)
  • Dimension: 166 mm x 130 mm
  • Onboard USB-Blaster II
  • Support ASx4 Configure Mode with 128Mbits QSPI Flash
  • Board Management System
    • Power Monitor
    • Temperature Monitor
    • Auto fan Control
  • Optional Active Heatsink

FPGA side

  • DDR4: 1GB DDR4 with 32-bit data bus (no ECC), shared with HPS.
  • SDRAM: 64MB SDRAM with 32-bit data bus (no ECC).
  • HDMI 1.4 Output Port (Support 1080P)
  • One 2-lanes MIPI Connector for Camera/Display
  • Composite video-In
  • 24-bits audio codec: MIC-In, Line-In, and Line-Out
  • 8-channel ADC with 2×5 header
  • IR TX/RX
  • One 3.3V 2×20 DE-GPIO Header
  • One HSMC connector with 4 transceivers.
  • User LED x10, Button x4, Slide Switch x10, 7-segment x6

HPS side

  • MicroSD Socket
  • DDR4: 1GB DDR4 with 32-bit data bus (no ECC), shared with FPGA
  • Gigabit Ethernet PHY + RJ45
  • Two USB Host ports with USB Type-A connector
  • UART to USB Port
  • 128×64 LCD
  • Accelerometer
  • LED x1, Button x1, Cold Reset Button
  • One 3.3V 1×6 GPIO Header

Software Support

  • FPGA Example Code
  • Linux BSP

Block Diagram

Connection to 2×20 GPIO Daugher Card

Connect LT24

Connect MTL2

Connect D8M

Connect SMK

Connect RFS2

Connection to HSMC Daugher Card

Connect HTG

Connect ADA

Connect DCC

Size：166*130 mm

  

  1. DE25-Standard Board
  2. Type-C USB Cable
  3. AC Power Cord
  4. 12V 60W Power Supply
  5. Quick Start Guide
  6. Four Silicon Footstands
  7. Fan (Installed)

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